In the early days of VLSI, the design of the power distribution for an integrated cir­ cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi­ vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over­ lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough