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Cookie akzeptieren![Elmasry, Mohamed I. / Catherine H. Gebotys. Optimal VLSI Architectural Synthesis - Area, Performance and Testability. Springer US, 1991.](https://eichendorff21.de/cdata/dKLEXeGD6j1k9UJm2k9kqoIVy3o=/300x0/9780792392231.png)
Mohamed I. Elmasry / Catherine H. Gebotys
Optimal VLSI Architectural Synthesis
- Springer US
- 1991
- Gebunden
- 312 Seiten
- ISBN 9780792392231
Although research in architectural synthesis has been conducted for over ten years it has had very little impact on industry. This in our view is due to the inability of current architectural synthesizers to provide area-delay competitive (or "optimal") architectures, that will support interfaces to analog, asynchronous, and other complex processes. They also fail to incorporate testability. The OASIC (optimal architectural synthesis with interface constraints) architectural synthesizer and the CATREE (computer aided trees) synthesizer demonstrate how these problems can be solved. Traditionally architectural synthesis is viewed as NP hard and there fore most research has involved heuristics. OASIC demonstrates by using an IP approach (using polyhedral
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